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d7297bb86a
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62e2c86480
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@ -0,0 +1,178 @@
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DAT
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{
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video-treiber-frame
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- basiert auf dem tollen tutorial von bamse
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30-09-2009-dr235 driver 1 - originalcode, anpassung an hive
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driver 2 - senkrechte balken
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driver 3 - einfarbige fläche
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driver 4 - wandernde farbbalken, 1 byte pro pixel :)
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driver 5 -
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}
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CON
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_CLKMODE = xtal1 + pll16x
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_XINFREQ = 5_000_000
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PUB start
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cognew(@entry,0) ' neue cog mit video-treiber starten
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DAT org 0
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entry jmp #Start_of_driver ' Start here...
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' NTSC sync stuff.
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NTSC_color_freq long 3_579_545 ' NTSC Color Frequency
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NTSC_hsync_VSCL long 39 << 12 + 624 ' Used for the Horisontal Sync
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NTSC_active_VSCL long 188 << 12 + 3008 ' Used for the Vertical sync
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NTSC_hsync_pixels long %%11_0000_1_2222222_11 ' Horizontal sync pixels
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NTSC_vsync_high_1 long %%1111111_2222222_11 ' Vertical sync signal part one for lines 1-6 and 13 to 18
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NTSC_vsync_high_2 long %%1111111111111111 ' Vertical sync signal part two for lines 1-6 and 13 to 18
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NTSC_vsync_low_1 long %%2222222222222222 ' Vertical sync signal part one for lines 7-12
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NTSC_vsync_low_2 long %%22_1111111_2222222 ' Vertical sync signal part two for lines 7-12
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NTSC_sync_signal_palette long $00_00_02_8A ' The sync Palette
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' hbeat --------+ +------------------------- /cs
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' clk -------+| |
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' /wr ------+|| | +---------------------- videopins
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' /hs -----+||| | |
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' |||| |--+ -------- d0..d7
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tvport_mask long %00000000_01110000_00000000_00000000 ' Maske für Video-Pins am Hive
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vsu_cfg long %01110100_00000000_00000100_01110000 ' Wert für VCFG-Register
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NTSC_Graphic_Lines long 244 ' Anzahl der sichtbaren Zeilen
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NTSC_Graphics_Pixels_VSCL long 16 << 12 + 16 ' 16 clocks per pixel, 64 clocks per frame.
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PAL0 long $01
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PAL1 long $0E
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PAL2 long $0D
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PAL3 long $0C
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PAL4 long $0B
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DIF1 long $00_10
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CNT_ANIM long $4
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' Loop counters.
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line_loop long $0 ' Line counter...
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pix_loop long $0
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anim_loop long $0
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' General Purpose Registers
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r0 long $0 ' Initialize to 0
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r1 long $0
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r2 long $0
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r3 long $0
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c1 long $0 ' colorregister
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c2 long $0
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c3 long $0
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'========================== Start of the actual driver =============================================
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Start_of_driver
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' VCFG, setup Video Configuration register and 3-bit tv DAC pins to output
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mov VCFG, vsu_cfg ' Konfiguration der VSU
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or DIRA, tvport_mask ' Set DAC pins to output
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' CTRA, setup Frequency to Drive Video
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movi CTRA,#%00001_111 ' pll internal routed to Video, PHSx+=FRQx (mode 1) + pll(16x)
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mov r1, NTSC_color_freq ' r1: Color frequency in Hz (3.579_545MHz)
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rdlong r2, #0 ' Copy system clock from main memory location 0. (80Mhz)
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' perform r3 = 2^32 * r1 / r2
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mov r0,#32+1
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:loop cmpsub r1,r2 wc
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rcl r3,#1
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shl r1,#1
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djnz r0,#:loop
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mov FRQA, r3 ' Set frequency for counter A
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'========================== Start of Frame Loop ==============================================
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frame_loop
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mov anim_loop, CNT_ANIM
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frame_loop2
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'========================== Screen =============================================
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mov line_loop, NTSC_Graphic_Lines ' anzahl der zeilen laden (244)
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user_lines
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'------ zeilensynchronisation
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mov VSCL, NTSC_hsync_VSCL ' Setup VSCL for horizontal sync.
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waitvid NTSC_sync_signal_palette, NTSC_hsync_pixels ' Generate sync.
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'------ sichtbarer zeileninhalt
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mov VSCL, NTSC_Graphics_Pixels_VSCL ' Setup VSCL for user pixels.
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'------ verschiedenfarbige balken ausgeben
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mov c1, PAL4
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add c1, c3
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mov pix_loop, #23
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bar_loop
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add c1, #$10 ' 8 x pixel einzeln! ausgeben
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mov c2, c1 ' also 2 tiles
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waitvid c2, #0 ' 8 bit pro pixel!
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add c2, #1
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waitvid c2, #0
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add c2, #1
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waitvid c2, #0
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add c2, #1
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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djnz pix_loop, #bar_loop
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sub c2, #1
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waitvid c2, #0 ' 4 mal extrapixel, für das timing
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sub c2, #1 ' also insgesamt 188 pixel pro zeile
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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sub c2, #1
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waitvid c2, #0
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djnz line_loop, #user_lines ' schleife durch alle zeilen
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'========================== The 16 lines of Horizontal sync ==================================
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mov line_loop, #6 ' Line 244, start of first high sync.
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vsync_high1 mov VSCL, NTSC_hsync_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_high_1
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mov VSCL, NTSC_active_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_high_2
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djnz line_loop, #vsync_high1
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mov line_loop, #6 ' Line 250, start of the Seration pulses.
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vsync_low mov VSCL, NTSC_active_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_low_1
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mov VSCL,NTSC_hsync_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_low_2
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djnz line_loop, #vsync_low
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mov line_loop, #6 ' Line 256, start of second high sync.
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vsync_high2 mov VSCL, NTSC_hsync_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_high_1
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mov VSCL, NTSC_active_VSCL
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waitvid NTSC_sync_signal_palette, NTSC_vsync_high_2
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djnz line_loop, #vsync_high2
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'========================== End of Frame Loop =============================================
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djnz anim_loop, #frame_loop2
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add c3, #$10
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'========================== Animation ==================================
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jmp #frame_loop ' And repeat for ever...
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FIT
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